Tổng quan công việc
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Ngày đăng20/10/2026
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Ngày hết hạn10/12/2026
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Bằng cấpCử nhân
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Trình độExpert
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Loại công tyOutsourcing
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Kiểu làm việcOnsite
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DomainBán dẫn
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Thời gian làm việcT2 - T6 (VN)
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Địa điểm làm việcHai Chau District, Da Nang / Cau Ong Lanh Ward, Ho Chi Minh City
Mô tả công việc
This role is responsible for leading DFT methodology across full-chip and IP DFT, overseeing architecture design, implementation, and test vector generation. You will ensure seamless execution through silicon validation and actively resolve technical issues while collaborating closely with engineering teams.
- Chip top DFT architecture plans, test plans.
- Define and implement DFT methodologies and strategies across SoC functions, including scan, BIST, ATPG, compression, SSN, IP testing and so on.
- Develop approaches that reduce test cost, enhance product quality, and improve yield in advanced process technologies.
- Oversee the DFT flow from architecture through to silicon validation, including pattern generation, coverage analysis, and debug in RTL/gate-level simulations. Interface with test engineers for ATPG/MBIST delivery.
- Engage closely with RTL, physical design, verification, and manufacturing teams to integrate DFT features and carry out ship-ready transitions.
- Communicate DFT status, risks, and technical bottlenecks to senior management and customers; recommend actionable solutions.
SKILLS AND QUALIFICATIONS:
- Bachelor’s or Master’s degree in Electronic Engineering or equivalent
- 10+ years’ experience in digital DFT implementation for ASIC/SoC designs.
- Proficiency in DFT flows: Chip top dft architecture plan, Test plan, Scan stitching, Scan compression, ATPG, MBIST, IJTAG, SSN, pattern simulation debug, post-silicon diagnose.
- Expertise with tools like Tessent, Synopsys DFTmax, scripting (Python, TCL)
- Experience with post silicon DFT bring-up and debug.
- Experience with turnkey whole-chip project
- English good communication
BENEFITS:
- Competitive salary, commensurate with qualifications and experience
- Cutting-edge SoC/ASIC projects
- Strong technical mentorship & career growth
- Own complex blocks, work on top-level implementation
- Work with global semiconductor customers
- Professional, friendly, and supportive working environment
- Annual bonus, paid twice per year
- Annual performance review with clear growth and development discussions
- Full benefits in accordance with Vietnamese labor law
- Premium insurance for employees and family (spouse, children)
- Team-building activities, internal events, and company-wide engagement programs
Interview
2 rounds online (Technical + Cultural fit)