Mô tả công việc

You will work as a Technical Leader/ Manager in the physical design team, and:

• Lead RTL-to-GDSII implementation for multiple SoC programs, overseeing synthesis, floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, and physical verification (DRC/LVS).
• Provide technical direction to physical design team, ensuring successful and timely tape outs of complex, high-performance SoCs.
• Mentor and develop engineering talent, fostering a culture of innovation, collaboration, and continuous improvement.
• Drive cross-functional collaboration with design teams to influence design decisions and ensure successful project execution.
• Navigate and resolve cross-functional conflicts effectively, fostering alignment and maintaining momentum across diverse teams.
• Drive the development and adoption of next-generation physical design methodologies, flows, and automation to improve productivity and design quality.
• Represent the physical design function in cross-org and executive-level discussions, contributing to long-term technology and product strategy

SKILLS AND QUALIFICATIONS:

• Bachelor’s, Master’s, or PhD degree in Electrical Engineering, Computer Engineering, or a related field.
• 7+ years of progressive experience in back-end physical design and verification
• Proven track record of leading and scaling physical design team, managing complex SoC projects, and delivering high-quality tapeouts under aggressive schedules.
• Deep expertise in hierarchical physical design strategies, methodologies, and advanced process node challenges.
• In-depth understanding of current design technologies used in major foundries.
• Strong understanding of ASIC design flow, RTL integration, synthesis, and timing closure.
• In-depth knowledge of modern EDA tools and flows.
• Proficient in automation and scripting using Makefile, Tcl, Python, or Perl to enhance design efficiency and flow robustness.
• Strong communication and collaboration skills, with the ability to influence cross-functional teams and executive stakeholders.
• Experience in developing and deploying advanced physical design methodologies and flows.
• Familiarity with AI/ML-driven optimization in physical design tools is a plus.
• English good communication 

BENEFITS:

• Competitive salary, commensurate with qualifications and experience
• Cutting-edge SoC/ASIC projects
• Strong technical mentorship & career growth
• Own complex blocks, work on top-level implementation
• Work with global semiconductor customers
• Professional, friendly, and supportive working environment
• Annual bonus, paid twice per year
• Annual performance review with clear growth and development discussions
• Full benefits in accordance with Vietnamese labor law
• Premium insurance for employees and family (spouse, children)
• Team-building activities, internal events, and company-wide engagement programs